1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to the handling of interrupts within data processing systems using one or more virtual processing apparatuses.
2. Description of the Prior Art
It is known to provide data processing systems with virtualisation support for one or more virtual processing apparatuses. One example of such systems is where a particular processor is physically implemented and it is desired to provide support for multiple virtual machines. In these circumstances the physical processor can execute is software (e.g. hypervisor software) to provide support for the multiple virtual machines, e.g. switching between which virtual machine is executing.
One particular problem within systems providing such virtualisation support is how interrupts are handled. Interrupt processing speed is often a critical performance parameter of a data processing system, particularly in the field of real time processing. One approach is to provide a software-based virtual interrupt controller in the hypervisor code for each virtual processing system supported. An attempt by the virtual processing system to access the interrupt controller causes an entry to the hypervisor which can then simulate the correct response. If accesses to the interrupt controller are frequent, then this can be disadvantageously slow. The processing of each interrupt typically involves a minimum of two interrupt controller accesses and often more. Furthermore, some virtual processing systems make frequent accesses to the interrupt controller to change the active priority level for the processor. Accordingly, this software-based virtual interrupt controller technique providing the required functionality has a noticeable negative impact on overall performance.
It is also possible to build a hardware based mechanism which supports multiple virtual machines natively and maps each virtual machine's interrupt controller accesses to the appropriate action in hardware. However, this hardware approach can involve a disadvantageously large hardware overhead and can also impose potentially limiting restrictions in terms of how many interrupts and/or virtual machines can be supported.
A further approach is the use of paravirtualisation to reduce the overhead of interrupts by using more efficient hypercalls. Even with these approaches there will be at least one hypervisor entry when a physical interrupt arrives and another when the interrupt processing is completed (to enable the physical interrupt to be re-enabled).